The present invention relates generally to audio, video, and audio/video interconnected systems for home and office use. More particularly, the present invention relates to a method and system for adjusting isochronous bandwidth allocations in a digital bus system.
With the development of consumer electronic audio/video (A/V) equipment, and the advance of digital A/V applications, such as consumer A/V device control and signal routing and home networking, various types of data in various formats can now be transferred among several audio/video control (AV/C) devices via one digital bus system. However, many current systems do not have sufficient bandwidth resources to transfer and display all the different types of data at the same time.
Typical computer systems solve the bandwidth problem by increasing the bandwidth of the system bus to handle all of these forms, types and amount of data. As a result, as users request more types of information, such as in multimedia applications, the system bus has become more clogged with information other than information directly utilized and needed by the main processor.
Many computer systems incorporate at least two buses. A first bus, commonly referred to as a memory bus, is typically used for communications between a central processor and a main memory. A second bus, known as a peripheral bus, is used for communications between peripheral devices such as graphics systems, disk drives, or local area networks. To allow data transfers between these two buses, a bus bridge is utilized to xe2x80x9cbridge,xe2x80x9d and thereby couple, the two buses together.
One example of a high-speed bus system for interconnecting A/V nodes, configured as a digital interface used to transport commands and data among interconnecting audio/video control (AV/C) devices, is the IEEE 1394 standard serial bus implemented by IEEE Std 139-41995, Standard For A High Performance Serial Bus, Aug. 30, 1996 (hereinafter xe2x80x9cIEEE 1394 standardxe2x80x9d) and related other 1394 standards.
The IEEE 1394 standard is an international standard for implementing a high-speed serial bus architecture, which supports both asynchronous and isochronous format data transfers. The IEEE 1394 standard defines a bus as a noncyclic interconnect, consisting of bus bridges and nodes. Within a non-cyclic interconnect, devices may not be connected together so as to create loops. Within the non-cyclic interconnect, each node contains an AV/C device, and bus bridges serve to connect buses of similar or different types.
The primary task of a bridge is to allow data to be transferred on each bus independently without degrading the performance of the bus, except when traffic crosses the bus bridge to reach the desired destination on the other bus. To perform this function, the bridge is configured to understand and participate in the bus protocol of each of the buses.
Multi-bus systems are known to handle the large amounts of information being utilized. However, communication between buses and devices on different buses is difficult. Typically, a bus bridge may be used to interface I/O buses to the system""s high-performance processor/memory bus. With such I/O bridges, the CPU may use a 4-byte read and write transaction to initiate DMA transfers. When activated, the DMA of a serial bus node generates split-response read and write transactions which are forwarded to the intermediate system backbone bus which also implements serial bus services.
Depending on the host system design, the host-adapter bridge may have additional features mandated by differences in bus protocols. For example, the host bus may not directly support isochronous data transfers. Also, the host-adapter bridge may enforce security by checking and translating bridge-bound transaction addresses and may often convert uncached I/O transactions into cache-coherent host-bus transaction sequences.
Each time a new device or node is connected or disconnected from an IEEE 1394 standard serial bus, the entire bus is reset and its topology is reconfigured. The IEEE 1394 standard device configuration occurs locally on the bus without the intervention of a host processor. In the reset process, three primary procedures are typically performed; bus initialization, tree identification, and self identification. Within the IEEE 1394 standard, a single node must first be established as the root node during the tree identification process in order for the reconfiguration to occur.
Isochronous data connections have one talker and one or more listeners. The talker broadcasts audio, video, or any other data format. Both the talker and listener are nodes on the digital bus system. Isochronous data is routed by channel numbers from the talker to the listener. The channel numbers are assigned to the data connections dynamically.
Each listener has an associated controller that sets up the isochronous connection between the talker and listener. The controllers signal the bus bridges (through their associated portals) to expect data having a certain bandwidth. Sometimes, the bandwidth allocated for the data being broadcast by the talker must be increased or decreased because the data format changes. For example, a talker may broadcast highly compressed video data at 25 megabits per second and then begin broadcasting lightly compressed video requiring 50 megabits per second of bandwidth.
The change in bandwidth could, of course, be signaled by immediately transmitting the data packets at the higher bandwidth. The bus bridges can detect the larger packets and requested additional bandwidth from their bus local isochronous resource managers (IRMs).
Several problems are encountered by the above described approaches. For example, a certain amount of latency is experienced during the time when the talker begins sending larger data packets until the controller allocates the additional bandwidth necessary. The latency results in lost data packets that are rejected by the digital bus system.
In prior systems, a bandwidth change indication is generally broadcast over the entire bus system because talkers do not know the bus addresses of controllers because numerous bus connections (one for each listener) may be associated with a specific talker, and each listener may be associated with a distinct controller. A reliable broadcast mechanism for sending the bandwidth change indication is difficult to implement since all nodes may not receive the indication. These missed nodes will not return an error message to the digital bus system. Furthermore, a widely broadcast message tends to flood the bus system with messages causing data congestion.
A method of adjusting the bandwidth allocated for isochronous data traffic on an interconnected data bus is disclosed. The present system uses an isochronous resource manager (IRM) to sense a bandwidth change request from a talker. The IRM instigates a bandwidth adjustment associated with the bandwidth change request to one or more bus bridge portals.